Vinodh Cuppu

High-Performance DRAMs in Workstation Environments (2001)

Cuppu, Vinodh, Jacob, Bruce, Davis, Brian, Mudge, Trevor

This paper presents a simulation-based performance study of several of the new high-performance DRAM architectures, each evaluated in a small system organization. These small-system organizations...

High-Performance DRAMs in Workstation Environments (2001)

Cuppu, Vinodh, Jacob, Bruce, Davis, Brian, Mudge, Trevor

This paper presents a simulation-based performance study of several of the new high-performance DRAM architectures, each evaluated in a small system organization. These small-system organizations...

Concurrency, Latency, or System Overhead: Which Has the Largest Impact on Uniprocessor DRAM-System Performance? (2001)

Cuppu, Vinodh, Jacob, Bruce

Given a fixed CPU architecture and a fixed DRAM timing specification, there is still a large design space for a DRAM system organization. Parameters include the number of memory channels, the...

Concurrency, Latency, or System Overhead: Which Has the Largest Impact on Uniprocessor DRAM-System Performance? (2001)

Cuppu, Vinodh, Jacob, Bruce

Given a fixed CPU architecture and a fixed DRAM timing specification, there is still a large design space for a DRAM system organization. Parameters include the number of memory channels, the...

DDR2 and Low Latency Variants (2000)

Davis, Brian, Mudge, Trevor, Jacob, Bruce, Cuppu, Vinodh

This paper describes a performance examination of the DDR2 DRAM architecture and the proposed cache-enhanced variants. These preliminary studies are based upon ongoing collaboration between the...

DDR2 and Low Latency Variants (2000)

Davis, Brian, Mudge, Trevor, Jacob, Bruce, Cuppu, Vinodh

This paper describes a performance examination of the DDR2 DRAM architecture and the proposed cache-enhanced variants. These preliminary studies are based upon ongoing collaboration between the...

Organizational Design Trade-Offs at the DRAM, Memory Bus, and Memory Controller Level: Initial Results (1999)

Cuppu, Vinodh, Jacob, Bruce

This paper presents initial results in a study of organization level parameters associated with the design of the primary memory system—the DRAM system beneath the lowest level of the cache...

Organizational Design Trade-Offs at the DRAM, Memory Bus, and Memory Controller Level: Initial Results (1999)

Cuppu, Vinodh, Jacob, Bruce

This paper presents initial results in a study of organization level parameters associated with the design of the primary memory system—the DRAM system beneath the lowest level of the cache...

A Performance Comparison of Contemporary DRAM Architectures (1999)

Cuppu, Vinodh, Jacob, Bruce, Davis, Brian, Mudge, Trevor

In response to the growing gap between memory access time and processor speed, DRAM manufacturers have created several new DRAM architectures. This paper presents a simulation-based performance study...

A Performance Comparison of Contemporary DRAM Architectures (1999)

Cuppu, Vinodh, Jacob, Bruce, Davis, Brian, Mudge, Trevor

In response to the growing gap between memory access time and processor speed, DRAM manufacturers have created several new DRAM architectures. This paper presents a simulation-based performance study...